Many mobile devices require dynamic random access memories (DRAMs) with extremely low standby power specifications to conserve battery power. One type of DRAM designed for mobile devices is CellularRAM™, which has a specified standby current of about 100 μA. The suppression of leakage current is typically more difficult in CellularRAMs than in standard DRAMs since even a small leakage current has a large contribution to the overall current in a CellularRAM. Specifically, shorts in a memory array that pull the bit lines to ground or to the negative word line low voltage level create a leakage path through the bit line equalize devices to the bit line equalization voltage, which is half of the bit line voltage in the case of a standard midlevel sense amplifier.
In standard DRAM sense amplifier designs, a device is added that increases the resistance between the bit line and the bit line equalization voltage and limits the current. Typically, the device that provides the additional resistance is a long channel transistor or a depletion transistor. Typical DRAMs limit the leakage current using the additional resistance to a value between 10 μA and 50 μA per short. While this level of leakage current is satisfactory for a standard DRAM with a standby current specification of a few milliamps, this level of leakage current is not sufficient for extreme low power DRAMs, such as CellularRAM. Increasing the resistance of this device to further reduce the leakage current has two significant disadvantages. The first disadvantage includes greatly increasing the sense amplifier area, and the second disadvantage includes possible insufficient equalization of all bit lines.